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4 Synchronization circuit board

The sync board sits right behind the two cameras on the base. It has three basic jobs: combine the right and left camera video streams into a single serial stream, control the synchronization input to the right camera, and generate the LCD shutter control signal. The double-sided board measures 4" by 1 5/8". All components are through-hole for easier hand soldering. See the schematic in figure 32 for references to components.

 

Drawing

Figure 26 Camera module - function and connector placement

4.1 Video switch

The video signal from each camera is received at inputs to U2, a CD4066 analog switch. Three sections of U2 are used: one for each camera video signal, and one for the right camera sync signal. The odd/even signal (FODD) from the left camera is applied to the U2's enable input for the right camera video, and the inverse of FODD enables the left camera video. The output of the two sections are tied together, and go to the video output RCA connector, J3.

Drawing shows simplified switching between left and right video streams using the odd/even field signal.

Figure 27 Video Switch Simplified Diagram

FODD will be low for the odd field, and high for the even field, and changes at the time of vertical sync. This signal enables the left camera video (L_video) when low, and the right camera video (R_video) when high.

4.2 Power-on reset timer

The V-XA095 has the peculiar characteristic of not powering up properly if there is any signal applied to its frame sync input. To overcome this, a power-up delay circuit keeps that signal tri-stated for about eight seconds. The frame sync output signal (FSO) is applied to section C of U2, which becomes the input sync signal to the right camera. The enable for this section comes from the power-up delay circuit, made up of U3 and U4A. U3 is a 74HC40103, which is an eight-stage down counter. All of its inputs are tied high except the clock (CP) and the master reset (MR). The inverted FODD signal is used as a clock. The inverted signal is used in order to load camera output signals as little as possible.

Simplified drawing of the right sync enable circuit.

Figure 28 Right Sync Enable

The power-on reset (POR) signal comes from an RC network that keeps U3 and U4A in reset until +5V power is stable. The down counter's outputs are all high while in the reset state. Once the POR signal has gone high, positive transitions on the clock input will decrement the count from 255 down to zero. When zero is reached, the TC (terminal count) output goes low. The next clock resets the chip to its maximum count, and TC returns to the high state. This transition of TC is sent to U4A. U4A's D input is held high, so when its clock input rises, its output (oe) goes high, enabling the analog switch. The frame sync output from the left camera is now connected to the frame sync input to the right camera.

Since the clock input to U2 has 30 rising edges every second, the delay from POR going high to FSI being enabled is about 8 1/2 seconds. Figure 29a shows the timing relationship between FSO, FODD, OE and FSI for stereo viewing Figure 29b shows the timing necessary generate FSI for stereo range sensing.

Referring to the schematic in figure 32, the odd/even signal from the left camera (L_odd_even) is applied to pin 2 of U1A, and inverted to become por_clk. P1 in is then used to select either the odd/even signal from the left camera for stereo viewing, or its inverse for stereo ranging.

Timing diagram -- Generating FSI for Odd/Even Fields

Figure 29a Generating FSI for Odd/Even Fields

Timing diagram -- Generating FSI for Odd Fields (Stereo Ranging)

Figure 29b Generating FSI for Odd Fields (Stereo Ranging)

4.3 Shutter control

The shutter control is made up of one half of a 74HC123 dual multivibrator and the other half of the 74HC74. This circuit has two jobs. First, shutter glasses have some delay between the change of signal and the actual switching of the glasses. This circuit will allow the user to control the moment the LCD glasses are switched.

VERY simplified block drawing of the shutter control delay circuit.
Figure 30 Shutter Control Delay

The second job is to help the user to get the correct camera video to the correct shutter LCD. Since there is no way for the circuitry to tell which is frame is intended for which eye, the user must have a way to move the LCD shutter transition so that the correct view is seen by each eye.

This is done using the two capacitors, C7 and C8, the resistor R2 and the potentiometer R3. These are the timing components for the one-shot. The values of the caps and resistors were selected to allow enough range to select either frame for either eye. When using the glasses, adjusting the pot will allow you to see a black bar that indicates the LCD shutter switching between the two frames.

As the pot is adjusted, that bar can move up or down; when the bar is at the very bottom of the screen (far enough to be not visible) one view is going to each eye. When the pot is adjusted the other way so the bar moves up the screen to the top (and beyond where it isn't visible) the opposite view is going to each eye.

The pot can also be adjusted far enough so that the delay period of the one-shot will be longer than the 16.67 millisecond period of odd/even frame signal. When that happens, the both LCD shutters are enabled, and the pot should be backed off until it is evident (from the flicker) that the shutters are again being operated. Figure 31 shows shutter control timing for minimum and maximum values of R3.

The shutter control output connector is the same as that used for the power supply.

Shutter control timing diagrams

Figure 31 Shutter Control Timing

4.4 Power Supply

The power input section consists of an input DC connector, SPDT switch, a 78L05 voltage regulator and filter and decoupling capacitors. DC power brought in from an AC to DC converter goes straight to the switch. The top position of the switch (towards the camera connectors J1 and J2) turns power off, and the bottom position, towards the power connector, turns power on.

The current draw for each cameras is about 25mA, and about 33mA for the board. The module can accommodate 9 - 12V from an AC-DC adapter, which should be able to supply at least 100ma. The adapter power connector is a 2.1mm female adapter, wired positive-center. (All power supply adapters in the project are wired positive-center except the VGA converter.)

Schematic of the synchronization circuit board.

Figure 32 Schematic, Sync Board

Because this schematic is just barely adequate for reading, a larger view is available here.

ItemDigikey P/NDescriptionValueQtyRefdes
1296-1563-5-ND74HC00 quad NAND1U1
2296-2061-5-NDCD4066 analog switch1U2
3296-9200-5-ND74HC40103 8-bit counter1U3
4296-1602-5-ND74HC74 dual D-flip-flop1U4
5296-9171-5-ND74HC123 dual timer1U5
6296-1365-NDUA78L05ACLP 5V regulator1U6
71N4148MSCT-ND1N4148 diode1D1
8P5134-NDCapacitor, Electrolytic10uF1C1
9BC1127CT-NDCapacitor, ceramic0.1uF5C2-C6
10P4967-NDCapacitor, ceramic0.47uF2C7, C8
11P2105-NDCapacitor, electrolytic1.0uF1C9
1312KEBK-NDResistor, 1/8W12K1R1
123.9KEBK-NDResistor, 1/8W3.9K1R2
143310C-1-503-NDPotentiometer50K1R3
15CKN5001-NDon-on SPDT PCB switch1SW1
16CP-1400-NDPhono jack, R/A PCB1J3
17SC1153-NDPower jack, R/A PCB2J4, J5
18WM4004-NDHeader 6-pin2J1, J2
19929400-01-36-NDHeader 3-pin1P1
20929950-00-ND0.1" shunt for item 161
21PCB, Sync Board1
For camera harness end:
22WM2605-ND6-pin connector housing2
23WM2200-ND.062" crimp terminals11

Table 2 Sync Board Bill of Materials

Both the Sync and the VGA Adapter circuit board bills of materials show Digikey as the source for all components. Other sources are available, such as Jameco, Mouser, Allied, etc., and in many cases may be cheaper. A single source was used in order to make parts ordering easier.

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